Chipstrat

Chipstrat — Bottom-up semiconductor supply model for the memory market: per-company wafer starts per month, die sizes, cell and node geometry, yield assumptions, and bits-per-wafer by process generation (with worked examples such as roughly 2.1 TB per wafer on a 1a node and roughly 3.7 TB on a 1y node), plus HBM wafer absorption, node-mix migration puts and takes, capacity coming online, and reconciled industry and company-level DRAM bit output, alongside a companion demand model and long-term-agreement analysis.. Micro-scale, high-signal: a one-person paid research publication (employee coun…

Chipstrat offers (Alternative, Fundamental, Price) — An ongoing archive of long-form analytical posts in the thousands of words each (this article runs roughly 9,000 characters of body text) with dozens of model tables per piece; the underlying working model is a per-company, per-node capacity spreadsheet refreshed each publication cycle..

Memory supply and shortage forecasting; bit-demand versus bit-supply gap analysis for pricing calls; capex and greenfield fab timing models; HBM wafer-absorption impact on conventional DRAM supply; long-term-agreement negotiation analysis for hyperscale buyers; supply-side equity research on memory makers; reproducible capacity models for semiconductor analysts and for grounding AI research agents.

The data is with 3 years of history.

Coverage spans US, APAC; Semiconductors; alternative, fundamental, price; equities.